- Location: SAN JOSE
- At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
- You will be a member of an expert R&D team creating technologies and products that enable static and dynamic transistor level analysis and characterization of the most advanced custom digital and mixed-signal circuits
You work will be focused on
- Research and development of AI/ML technology to bring order of magnitude speed/capacity/usability improvements to design analysis and characterization of digital and analog circuits
- Development of tools / infrastructure for characterization data mining
- Modeling designs effects dominant in advanced technology nodes such as aging and variation
Desired Skills and Experience
- Industry experience developing and maintaining C++ based applications on a Unix or Linux environment
- Experience with quality and software processes
-Experience in transistor level circuit design is a strong plus
- Experience in the use of AI/ML for EDA is a strong plus.
- Proficiency designing data structures, algorithms, and software engineering principles
The annual salary range for California is $119,000 to $221,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
We’re doing work that matters. Help us solve what others can’t.
Job description provided by Cadence Design Systems.
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