Own the Silicon Networking organization in Bengaluru, including definition, implementation and deployment of Networking IPs. Define IP development methodologies and drive deep technical involvement across the IP's development cycle, including seamless integration to SoC. Lead project planning from architecture and micro-architecture decisions to scoping effort, collaborating across teams to represent project status. Lead and manage a multi-disciplinary team of chip engineers, plan tasks, allocate people, and hold technical design/code reviews.
Guide and participate across the entire ASIC lifecycle, spanning architecture definition, RTL development, synthesis, timing/power, FPGA/silicon bring-up, and verification strategy. Drive the full development life-cycle of chips from initial definition to a high-quality tape-out. Ensure developed IPs contribute effectively across multiple key projects. Collaborate closely with cross-functional teams and other sites around the globe.
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