Google Technology/Software

RTL Design Engineer, TPU

Sunnyvale, CA In person Full-time

Work separately to create and review management and control subsystem's design microarchitecture specifications. Develop SystemVerilog RTL to implement logic for ASIC products according to established coding and quality guidelines. Work with architecture and power teams to evaluate features and their impact. Work with design validation (DV) teams to create test plans to verify, and debug design RTL. Work with physical design teams to ensure design meets physical requirements and timing closure.

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