Develop innovative microarchitectural features to significantly enhance CPU performance. Model complex core microarchitectural concepts and evaluate Performance, Power, and Area (PPA) trade-offs to deliver a buildable, production-ready microarchitecture. Define and document comprehensive CPU subsystem microarchitecture specifications. Lead cross-functional collaboration with RTL, physical design, and verification teams to ensure a high-performance, power-efficient CPU implementation. Drive performance correlation between the performance model and RTL implementation and perform pre-silicon and post-silicon performance bug triage.
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