Senior Software CAD Engineer - Cork, IRL

Company

QT Technologies Ireland Limited

Job Area

Engineering Group, Engineering Group > ASICS Engineering

General Summary

About the Role

The Global CAD team defines, develops, and supports RTL-to-GDSII design automation capabilities for advanced low-power and high-performance SoCs, enabling next-generation Qualcomm chipsets.

We are looking for a Senior Software CAD Engineer to join our team in Cork and develop software infrastructure for RTL quality, design automation, and project execution. The role focuses on building robust Python-based tools that help design teams run, debug, track, and report quality checks across complex SoC development environments.

The successful candidate will work closely with design, verification, CAD, and infrastructure teams to improve automation, reliability, visibility, and productivity across RTL development flows.

Responsibilities

• Develop and maintain Python-based software tools for design automation and RTL quality checks.
• Build automation for configuring, launching, monitoring, debugging, and reporting design flow results.
• Support quality checks across RTL design areas such as clock-domain crossing, reset-domain crossing, low-power verification, synthesis readiness, lint, and design rule checking.
• Improve infrastructure for configuration management, run setup, result tracking, waiver handling, reporting, and dashboards.
• Debug issues across software infrastructure, generated scripts, configuration files, design inputs, and EDA tool execution.
• Collaborate with design, verification, CAD, and infrastructure teams to support project execution and design quality closure.
• Improve code quality, test coverage, documentation, error handling, and developer workflows.
• Develop unit and integration tests for automation scripts and flow infrastructure.
• Identify and drive improvements to existing methodology, QA processes, execution environments, and user support models.

Minimum Qualifications

• Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

OR

Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.

OR

PhD in Science, Engineering, or related field.

Preferred Qualifications

• Experience developing reliable automation, infrastructure, or command-line tools used by engineering teams.
• Strong interest in learning semiconductor design automation and RTL quality methodologies.
• Experience with Python testing and quality tools such as pytest, mypy, black, isort, or similar.
• Experience with YAML/JSON configuration handling and validation.
• Knowledge of Perl, Tcl/tcsh, Makefiles, C++, Verilog, or SystemVerilog is a plus, but not required.
• Experience supporting tools integrated with dashboards, databases, reporting systems, or compute infrastructure is a plus.
• 3+ years of experience developing production-quality software in Python.
• Strong Linux skills and experience debugging complex software, infrastructure, or automation issues.
• Experience with Git-based software development.
• Good understanding of software engineering practices, including code review, testing, maintainability, and documentation.
• Strong problem-solving skills and ability to work effectively in a geographically distributed engineering environment.