R&D Engineering, Sr Engineer

Job Description and Requirements

We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are

An experienced professional with a passion for physical design and optimization. Your expertise includes place & route methodology, top-level implementation, and P&R timing sign-off. You have a comprehensive understanding of the complete PnR development flow and hands-on experience using industry-standard physical design tools such as Synopsys Fusion Compiler (FC).

You excel in high-performance and low-power physical design using standard EDA synthesis, P&R, and sign-off tools. Your real tape-out experience on SoC/CPU/GPU implementation is a significant advantage. You understand physical design signoff methodologies and have exposure to tools such as IC Validator (ICV), RedHawk, PrimeTime, and StarRC, or equivalent solutions. Along with executing designs, you are interested in continuously improving implementation flows, methodologies, and Power, Performance, and Area (PPA).

You bring strong debugging, analytical, and problem-solving capabilities and are comfortable collaborating with cross-cultural, geographically distributed, and matrixed engineering teams.

What You’ll Be Doing

• Developing foundry implementation/3DIC solutions aligned with SNPS reference methodology.
• Providing advanced engineering solution to foundry and end customers for DTCO/PPA and test chip.
• Debug complex implementation and flow issues using strong analytical and problem-solving skills.
• Drive foundry testchip (test vehicle) projects with SNPS advanced node enablement team.
• Coordinate with and influence foundry, internal teams, and end customers on real project issues and implementation flow optimization.
• Work with field account team and internal foundry jump start team for mutual customer support and their adoption of SNPS solutions.
• Collaborate with engineering teams across different functions, geographies, and cultures.
• Explore productivity improvements through modern engineering and AI-assisted tools such as Cursor.

The Impact You Will Have

• Contributing to the development of complex products that push the boundaries of technology.
• Supporting customers in the successful adoption of Synopsys solutions, leading to increased satisfaction and loyalty.
• Enhancing the efficiency and effectiveness of foundry implementation/3DIC solutions.
• Driving innovation by solving real project issues and optimizing implementation/3DIC flows.
• Improve Power, Performance, and Area (PPA) through design and flow optimization.
• Identify and resolve complex physical design and signoff issues.
• Help deliver high-quality physical design implementation for advanced node early designs for test chip success.
• Demonstrating the feasibility of innovative applications, influencing customer decisions.
• Leading and mentoring team members, fostering a culture of continuous learning and improvement.
• Enable effective collaboration across global and cross-functional engineering teams.

What You’ll Need

• BS or MS in Electrical Engineering with 2+ years of relevant experience.
• Proven track record of successfully delivering innovative products or solutions.
• Proficiency in place & route methodology, top-level implementation, and P&R timing sign-off.
• Expertise in high-performance and low-power physical design using standard EDA tools.
• Hands-on experience in PnR design implementation and/or PnR flow methodologies.
• Experience contributing to PPA improvement and flow optimization activities.
• Ability to work in a fast-paced, dynamic environment and manage multiple priorities effectively.
• Excellent collaboration and influencing skills with the ability to work effectively in cross-cultural, multi-geography, and matrixed teams.
• Exposure to AI-assisted engineering tools such as Cursor is a plus.

Who You Are

• You approach complex physical design challenges methodically and drive them through resolution.
• You enjoy debugging implementation, timing, physical verification, and flow-related issues.
• You look beyond basic design closure and continuously seek opportunities to improve PPA and implementation efficiency.
• You communicate technical issues clearly and collaborate effectively with geographically distributed teams.
• You are comfortable taking ownership while working as part of a broader engineering organization.
• Your collaborative nature helps you work seamlessly with cross-functional teams and external partners.
• You are adaptable, ready to take on new challenges and drive continuous improvement in all aspects of your work.
• You are curious about new methodologies, automation, and AI-assisted engineering approaches.

The Team You’ll Be A Part Of

You will be part of a dynamic and innovative team focused on developing cutting-edge foundry P&R implementation/3DIC/AI solutions with supporting foundry test chip projects. Our team collaborates closely with foundry, internal teams, and end customers to drive technological advancements and optimize implementation/3DIC flows. We value creativity, teamwork, and a commitment to excellence in all our projects.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

#TPG

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.