Staff Analog Design Engineer - PMIC

Role Overview

As a Staff Analog Design Engineer atTYLsemi, you will design and deliver high-performance analog and mixed-signal circuits that enable robust, manufacturable silicon. This role spans a wide experience range (5–30 years) and is ideal for engineers who combine strong fundamentals with practical execution—translating system requirements into silicon-ready designs, validating performance across corners, and partnering closely with layout, verification, test, and product teams to drive first-time-right outcomes.

WhatYou’llDo

• Designof Voltage Regulatorsincludinghigh-efficiency power stages,error amplifiers, current sensing, adaptive load-line circuits, fast transient compensation,protectionand telemetry.
• Modeling ofmixed-signal subsystemsincludingRegulatorcontrol loops,Power delivery network, DVFS subsystemsetc.to guide architectureand designtrade-offs
• Lead the collaborationwith SIPI/PI, packagingteams to co-optimizeVRand power delivery.

WhatWe’reLooking For

• 6 to 10 years of hands-on analog/mixed-signal IC design experience with a strong focus on high-current, high-efficiency Power management (PMIC / IVR / DC-DC converters).
• Deepexpertisein different voltage regulator topologiesincluding control loopsdelivering large currentat high switching frequencies.
• Hands-on experience in magnetics integration for high-density IVR— including inductor modeling, coupling effects, EMI/thermal co-optimization, and 3DIC package integration.
• Proficiencywith industry-standarddesign and modellingtoolsincludingCadence Virtuoso,Spectre, Clarity/EMX, MATLAB/Simulink.
• Experience in2.5D,packagingflowsand co-design with SIPI/PDN teams.

Team player with excellent communication skills

• BS/ MS / PhD in Electrical Engineering (Analog & Mixed-Signal focus)
• Nice to Have
• Experience withstate-of-the-artAI/HPCpower delivery.
• Experience in designing power management switching regulators, including Buck, Boost, Buck-Boost, LDO, and other PMIC building blocks.
• Strong background in power management circuits such as LDOs, bandgap references, voltage/current references, protection circuits, start-up circuits, transient response optimization, and related analog power management functions.
• Familiarity with advanced packagingflowand thermal/PI co-optimization
• Success in This Role Looks Like
• Analog blocks meet spec with margin across PVT, mismatch, and post-layout effects
• Design reviews are crisp: requirements, tradeoffs, and risks are clearly articulated and managed
• Siliconbring-up converges quickly through strong correlation, structured debug, and decisive fixes
• Cross-functional partners (layout, verification, test, validation) can execute efficiently with clear interfaces and documentation
• Reusable design collateral and improvedmethodologyreduce cycle time and increase first-pass success