Grupo Oesía Defense & Aerospace

ASIC Technical Lead | Semiconductor & Security Technologies

Rivas-Vaciamadrid, Spain In person Full-time
  • Grupo Oesía
  • Our projects become technology that protects, connects and drives strategic sectors: our own.
  • At Grupo Oesía, we work to ensure innovation delivers real impact, and we are looking for
  • people who want to be part of that challenge.
  • WHAT WILL YOUR MISSION BE?
  • At Cipherbit, part of Grupo Oesía, we are looking for an experienced
  • ASIC Technical Lead to take technical ownership of the development of
  • highly complex integrated circuits within strategic advanced-technology programmes.
  • You will act as a technical reference throughout the complete ASIC lifecycle,
  • from architecture and RTL design to verification, physical implementation, tape-out,
  • silicon validation and production.
  • The role involves coordinating multidisciplinary engineering teams and collaborating
  • with technology centres, IP providers, design houses, industrial partners
  • and international foundries.
  • You will contribute to innovative projects related to
  • security technologies, cryptography and advanced electronic systems,
  • helping develop strategic technological capabilities with real-world impact.
  • WHAT WILL YOU DO IN YOUR DAY-TO-DAY ROLE?
  • Lead the technical development of complex ASIC and SoC solutions
  • throughout their complete lifecycle.
  • Define and supervise ASIC and SoC architectures, including complex
  • solutions based on RISC-V, ARM or equivalent architectures.
  • Coordinate RTL design, verification, DFT, physical implementation,
  • tape-out, silicon validation and production activities.
  • Lead the integration of third-party IPs and complex subsystems
  • within advanced SoC designs.
  • Coordinate technical activities involving Front-End and Back-End flows.
  • Support advanced verification activities using UVM methodologies.
  • Coordinate and supervise DFT, ATPG, MBIST and LBIST activities,
  • as well as silicon validation and test.
  • Work closely with multidisciplinary teams covering
  • digital design, verification, physical implementation and test.
  • Coordinate technical activities with foundries, design houses,
  • technology centres and IP providers.
  • Provide technical guidance and support key decisions throughout development,
  • fabrication and validation of the ASIC.
  • WHAT ARE WE LOOKING FOR?
  • Degree in Telecommunications Engineering, Electronics, Industrial
  • Engineering, Computer Engineering or another relevant engineering discipline.
  • Demonstrable professional experience in ASIC and/or complex SoC development.
  • Participation in at least one complete ASIC development lifecycle.
  • Hands-on experience in ASIC tape-out and integrated circuit fabrication.
  • Experience designing complex SoCs based on RISC-V, ARM or equivalent architectures.
  • Experience integrating third-party IPs and complex subsystems.
  • Knowledge and practical experience in Front-End and/or Back-End ASIC flows.
  • Experience in advanced verification using UVM.
  • Knowledge and experience in DFT, ATPG, MBIST/LBIST and silicon validation.
  • Experience using industry-standard EDA tools such as
  • Cadence, Synopsys or Siemens EDA.

Experience working within multidisciplinary teams covering

  • design, verification, physical implementation and test.
  • WHAT WOULD MAKE YOU STAND OUT?
  • Direct participation in successful ASIC tape-outs.
  • Experience working across more than one semiconductor technology node.

Experience with semiconductor technologies between

  • 22 nm and 65 nm.
  • Experience defining complex SoC architectures.
  • Previous experience providing technical leadership to ASIC design teams.

Experience coordinating activities with

  • foundries, design houses, technology centres and IP providers.
  • WHAT DO WE OFFER?
  • The opportunity to participate in cutting-edge microelectronics and
  • semiconductor programmes.
  • Direct involvement in the design and development of
  • complex ASICs with real applications in security and cryptography.
  • A key technical leadership role in highly innovative and
  • specialised engineering projects.
  • Collaboration with a national and international ecosystem of
  • universities, technology centres, semiconductor manufacturers,
  • IP providers and industrial partners.
  • A highly specialised environment alongside professionals with extensive
  • experience in digital design, verification, hardware security
  • and microelectronics.

The opportunity to participate across the entire ASIC lifecycle

architecture, RTL, verification, DFT, physical implementation,

tape-out, validation and production.

Job description provided by Grupo Oesía.
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