- Grupo Oesía
- Our projects become technology that protects, connects and drives strategic sectors: our own.
- At Grupo Oesía, we work to ensure innovation delivers real impact, and we are looking for
- people who want to be part of that challenge.
- WHAT WILL YOUR MISSION BE?
- At Cipherbit, part of Grupo Oesía, we are looking for an experienced
- SoC / ASIC Architect to contribute to the definition and development
- of complex integrated circuits for advanced technology programmes.
- You will play a key technical role in the definition of complex SoC architectures,
- working with solutions based on RISC-V, ARM or equivalent architectures
- and defining the integration of third-party IPs and advanced subsystems.
- The position involves working across the complete ASIC development lifecycle,
- collaborating with multidisciplinary teams responsible for architecture, digital design,
- verification, physical implementation, DFT, test and silicon validation.
- You will also collaborate with foundries, design houses, technology centres
- and IP providers, contributing to strategic projects in advanced
- semiconductor and security technologies.
- WHAT WILL YOU DO IN YOUR DAY-TO-DAY ROLE?
- Define and evolve complex SoC and ASIC architectures
- for advanced integrated circuit developments.
- Design architectures based on RISC-V, ARM or equivalent processor technologies.
- Define the architecture and integration strategy for
- third-party IPs and complex subsystems.
- Make key architectural decisions considering system requirements,
- integration and implementation constraints throughout the ASIC lifecycle.
- Work closely with Front-End and Back-End teams,
- supporting the evolution of the architecture through implementation.
- Collaborate with verification teams using advanced methodologies such as
- UVM.
- Support architecture-related activities throughout
- DFT, ATPG, MBIST/LBIST, tape-out and silicon validation.
- Participate throughout the complete ASIC lifecycle, from
- architecture and design through tape-out, fabrication and silicon validation.
- Coordinate technical activities with foundries, design houses,
- technology centres and IP providers.
- Provide technical guidance and contribute to architectural decisions
- within multidisciplinary ASIC design and engineering teams.
- WHAT ARE WE LOOKING FOR?
- Degree in Telecommunications Engineering, Electronics,
- Industrial Engineering, Computer Engineering or another
- relevant engineering discipline.
- Professional experience in the architecture and development
- of complex ASICs and SoCs.
- Participation in at least one complete ASIC development lifecycle.
- Real hands-on experience in ASIC tape-outs and integrated
- circuit fabrication.
- Experience defining complex SoC architectures based on
- RISC-V, ARM or equivalent architectures.
- Experience with the integration of third-party IPs
- and complex subsystems.
- Knowledge and practical experience in
- Front-End and/or Back-End ASIC flows.
Experience in advanced verification environments using
- UVM methodologies.
- Knowledge of DFT, ATPG, MBIST/LBIST and silicon validation.
- Experience using industry-standard EDA tools such as
- Cadence, Synopsys or Siemens EDA.
Experience working with multidisciplinary teams covering
- design, verification, physical implementation and test.
- WHAT WOULD MAKE YOU STAND OUT?
- Direct participation in successful ASIC tape-outs.
- Experience working across multiple semiconductor technology nodes.
Experience with semiconductor technologies between
- 22 nm and 65 nm.
- Strong experience in the definition and evolution of
- complex SoC architectures.
- Previous experience providing technical leadership
- to ASIC design teams.
Experience coordinating technical activities with
- foundries, design houses, technology centres and IP providers.
- WHAT DO WE OFFER?
- The opportunity to participate in cutting-edge microelectronics
- and semiconductor programmes.
- A key role in the architectural definition of complex ASIC
- and SoC solutions.
- Participation in projects involving
- advanced semiconductor and security technologies.
- Exposure to the complete ASIC lifecycle, from
- architectural definition and RTL through physical implementation,
- tape-out and silicon validation.
- Collaboration with a national and international ecosystem of
- technology centres, semiconductor manufacturers,
- IP providers, design houses and industrial partners.
- A highly specialised environment alongside professionals with
- extensive experience in SoC architecture, digital design,
- verification, physical implementation and microelectronics.
Job description provided by Grupo Oesía.
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