At a glance
- Type
- Full Time
- Location
- Bengaluru, IN
- Posted
- Oct 12, 2026
- Visa sponsorship
- Cadence Design Systems sponsorsFrom recent H-1B filings
- Company size
- Large (5K-10K)
- Industry
- Technology/Software
About the role
Location: BANGALORE
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
BE/BTECH/ME/MTECH
2-5 yrs of work experiences in VLSI domain with Master’s/bachelor’s degree in engineering Strong expertise in Verilog, HVL(SV, Specman e) with UVM/OVM/eRM methodology Expertise in assertions development/closure, constraint randomization, functional and code coverages, formal verification Expertise in test-bench development Strong RTL and GLS (w/ or w/o SDF) sim debug skills Should be able to manage project schedule and delivery independently
Should be good in Perl/Tcl scripting and automation
We’re doing work that matters. Help us solve what others can’t.
About Cadence Design Systems
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