Design custom instruction sets, addressing modes, and hardware features targeting emerging frontier model operations (e.g., MLA, speculative verification, dynamic sparsity, multi-precision numerical formats). Deploy agentic orchestration and automated exploration pipelines to synthesize ISA configurations, generate test kernels, and discover architectural bottlenecks autonomously. Collaborate across ML research, XLA compiler, and RTL teams to ensure new instructions are seamlessly targetable, efficient to lower, and verify cleanly across simulation environments.
Implement instruction-level simulators, golden reference models, and trace analyzers to measure performance, silicon area, and compiler efficiency. Provide rigorous, data-driven architecture proposals to guide multi-generational silicon roadmaps.
Job description provided by Google.
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