Silicon Design Manager, RTL Machine Learning, Accelerator Design

Lead, mentor, and manage a team of RTL Design Engineers performing tasks related to IP development for Compute Cores. Provide technical leadership to engineers and model best design practices (i.e., micro-architecture specifications, design reviews, code reviews, design methodology, etc.). Serve as the primary point of contact for all design-related activities on projects. Participate with Architecture and System Design teams in architecture definition, IP area estimation, power optimization, and performance enhancements.

Collaborate closely with cross-functional teams (e.g., Verification, Design for Test, Physical Design, and Software) to make design plans and present project status throughout the development cycle. Drive improvements in design methodologies, processes, and quality control measures.