Lead the technical goal, roadmap, and software architecture for hardware/software co-design, optimizing large-scale ML inference and training systems. Design, develop, and oversee simulation frameworks, cycle-accurate performance models, and system analysis tools to evaluate architectural trade-offs. Architect scalable software solutions, kernels, and execution pipelines that bridge frontier ML model architectures with next-generation custom silicon accelerators.
Drive system-level performance optimization across distributed ML infrastructure, balancing compute, memory bandwidth, and inter-chip networking requirements. Provide technical leadership and mentorship across hardware, compiler, and ML research teams to align on goals and transition co-design innovations into production.
Job description provided by Google.
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