Drive the end-to-end silicon product architecture and roadmap for next-generation accelerators in collaboration with internal AI/ML research teams, software/systems teams, and customers, maintaining a rigorous hardware-software co-design process. Define and own product-level chip architectures and top-level specifications, ensuring products achieve goals across functionality, performance, power efficiency, die area/cost, reliability, usability, and fleet deployability.
Lead architectural pathfinding, trade-off studies, and engaging assessments of emerging AI workloads and semiconductor technologies. Set technical direction across key product subsystems to enable rapid and predictable execution of complex server-class ASICs. Partner across all phases of silicon development and with compiler/runtime teams to resolve cross-domain bottlenecks and deliver production-ready hardware/software stacks.
Job description provided by Google.
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