Physical Design and Implementation Engineer

Develop all aspects of ASIC RTL2GDS implementation for the central processing unit (CPU) for the Tensor SOC. Signoff convergence including static timing analysis (STA), physical design verification (PDV), IR and Electo-Migration (EM). Manage block and subsystem level physical implementation and QoR (power, timing, area). Optimize power, performance and area (PPA) to achieve exceptional performance and cost. Reduce time to market and improve PPA through deployment of Artificial Intelligence (AI) physical design tools and workflows.