Lead the critical "make vs. buy" decision for the future of DDR PHY IP and define the multi-year AMS roadmap for SoCs. Own the overall Power, Performance, and Area (PPA) envelope for the entire memory subsystem, dictating trade-offs and ensuring DDR access meets the extreme, high-stakes requirements of on-device GenAI models. Direct the integrated AMS and PMIC teams, ensuring high-quality execution of the immediate optimization roadmap.
Build the talent and organizational structure required for the long-term strategic vision, including building and scaling strategic teams or capabilities. Act as the technical and strategic liaison to executive leadership, driving organizational alignment and securing resource commitments across high-leverage internal stakeholders (CPU, TPU, system architecture, and product teams).
Job description provided by Google.
View the original posting
