Own transmitter and receiver characterization and compliance testing for SerDes interfaces across next-generation compute and networking platforms. Lead the development of advanced RX test methodologies, including jitter tolerance, stressed receiver sensitivity, bit error rate, and complex inter symbol interference channel testing. Interpret and map industry standards (IEEE 802.3, OIF-CEI) into rigorous, automated receiver test plans.
Master and deploy high-bandwidth lab instrumentation, including high-speed arbitrary waveform generators, bit error rate testers, real-time oscilloscopes, and vector network analyzers. Collaborate closely with ASIC PHY design, silicon design and validation, and signal integrity teams to root-cause link performance anomalies and optimize TX and RX equalizer and DSP parameters. Drive test automation development to maximize test coverage, measurement repeatability, and characterization efficiency.
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